A testing circuit is known for measuring the frequency of signal output from a clock generator as illustrated in the diagrammatic block diagram of FIG. 7.
Referring to FIG. 7, the testing circuit 100 for the frequency measurement includes a clock generator 101 configured to generate and output a clock having a predetermined frequency, and a frequency counter 102 configured to count a frequency of the clock outputted by the clock generator 101 to obtain frequency data and output resulting data to a counter memory 103.
The counter memory 103 subsequently sends the frequency data to a comparator circuit 104 and a specification memory 105 is configured to output the data on the upper and lower limits to the comparator circuit 104.
The comparator circuit 104 is configured to determine whether the frequency data sent from the counter memory 103 falls within the upper and lower limits and output a decision signal representative of the result obtained from the determination.
Therefore, the frequency testing can be properly implemented with the abovementioned configuration of the output frequency testing circuit 100.
In addition, another clock generator is disclosed in Japanese Laid-Open Patent Application No. 63-187949, for example. This clock generator is capable of automatically testing a variety of frequencies by counting by a frequency counter a frequency of the signal modulated by a frequency modulation circuit.
On the other hand, SSCG (spread spectrum clock generation) technique has been developed recently for suppressing EMI (electromagnetic interference) noises which are radiated from various electronic instruments.
The SSCG technique is configured to apply the frequency modulation to clock signals and disperse the frequency range of EMI noise emission, whereby the level of radiated EMI can be reduced.
In respect to the modulation, several waveforms are utilized such as, for example, either triangular or sinusoidal wave having a constant period, and a triangular waveform synthesized from a plurality of waves each having different modulation periods.
The output frequency of SSCG is generally in the range from several MHz to several hundreds Hz, while a modulation frequency in use for modulating the SSCG output ranges approximately 30 kHZ which is considerably smaller than the SSCG frequency.
FIG. 8 is a diagrammatic block diagram illustrating the configuration of an SSCG circuit previously known.
Referring to FIG. 8, a frequency divider 111 included in the SSCG circuit 110 is configured to implement multiplication setting on the clock signal So outputted by the SSCG circuit 110 such that a phase comparison is made by a phase comparator 112 between a reference input signal Sr and a feedback signal Sf formed by dividing by the frequency divider 111, and that a pulse signal corresponding to the phase difference resulted from the comparison is generated and then outputted by a charge-pump circuit 113.
An output signal from the charge-pump circuit 113 is subjected to the process of removing noises by a low-pass filter 114 and of smoothing, and subsequently outputted to an adder 115.
On the other hand, a modulated signal generator 116 is configured to generate a predetermined modulated signal for the SSCG circuit 110, and output a resulting signal to adder 115.
The adder 115 is configured to add two signals, one outputted by a low-pass filter 114 and the other outputted by a modulated signal generator 116, and then output to VCO (voltage control oscillator) 117 as a control voltage Vcnt.
The VCO 117 is configured to generate and output a clock signal So, which is modulated according to the control voltage Vcnt outputted by the adder 115.
FIGS. 9A through 9C illustrate modulation waveforms of clock signals So outputted by the SSCG circuit 110 such as a triangular wave, a sinusoidal wave, and another triangular wave synthesized from plural waves each having different modulation frequencies.
FIG. 10 illustrates another modulation waveform of clock signal So outputted by the SSCG circuit 110.
As illustrated in FIG. 10, the waveform of the clock signal So outputted by the SSCG circuit 110 is assumed to be triangular, having a center frequency fo and a frequency spread ±Δf.
When the frequency measurement on this signal is carried out for duration, t1˜t2, the increase in the integral of the waveform for one half of the duration ranging from t1 to ta is obtained to be equal to the decrease for the other half of the duration ranging from ta to t2. Therefore, the center frequency of the clock signal So is obtained to be fo.
However, another case may be considered in which the value of the center frequency is influenced by several factors.
For example, assuming the case in which (1) a scattering arises in modulation frequency caused by fluctuation during forming process, (2) the waveform of the clock signal So outputted by the SSCG circuit 110 is triangular, having a center frequency fo, and (3) the period of the modulation is larger than that of FIG. 10.
When a frequency count of the clock signal So is then carried out for the duration, t1˜t2, as shown in FIG. 11, the amount of increase in the integral of the waveform is obtained to be smaller than that of decrease. As a result of the smaller amount in integral, the center frequency is obtained as f1 which is smaller than fo.
That is, a difficulty in the previous method is encountered in that a center frequency is measured by being shifted from the actual frequency.
Therefore, in measuring the center frequency of the modulated clock signal outputted by the SSCG circuit by a previous counter and method, the difficulty such as above has been encountered in that its center frequency may be obtained as one shifted from the actual frequency depending on measurement timing.
In addition, if the frequency of modulated signal outputted by the SSCG circuit is scattered from one sample to another, the frequency count of the clock signal may be obtained to be different even among plural samples having the same center frequency even when the measurements are carried out for the same duration.
In the case of a triangular wave generator used as the means for generating modulated signals, in particular, a considerable scattering in modulation frequency may arise from one testing sample to another due to fluctuation during the process for forming the capacitance incorporated on the output side of the generator.
Moreover, although the accuracy of frequency measurement may increase in general with increasing the duration for the measurements, which may not be advantageous in the present frequency measurements, since the modulation frequency is considerably smaller than the SSCG output frequency and the increased duration has to lead to a considerably prolonged measurement period, whereby the increase is incurred in the number of counter bits as well as process costs.
It is therefore desirable to provide a testing circuit having improved capability of accurately measuring a center frequency of the signals outputted by a clock generator.